The successful demonstration of a ferroelectric non-volatile random access memory (FNVRAM) has led to considerable interest in improved fabrication methods for large area ferroelectric thin film structures. The basis of the FNVRAM is the thin film ferroelectric capacitor produced by two configurations: 1) by replacing the gate insulator with a thin film of ferroelectric oxide of a ferroelectric metal oxide field effect transistor (FEMFET), and 2) by using a ferroelectric capacitor where the charging current is measured in a complementary metal oxide semiconductor (CMOS). The ferroelectric oxides are inherently radiation-hard and the ferroelectric capacitor is unaffected by total dose, transient event or single event effects of electromagnetic pulses.
Existing manufacturing technologies for the development of ferroelectric digital memories have proven inadequate. Difficulties arise in ensuring reproducible deposition of large area, epitaxial or highly oriented polycrystalline thin films on semiconductor substrates which are compatible with very large scale integrated circuit (VLSIC) technology. Existing methods for depositing ferroelectric thin films include pulsed laser ablation deposition (PLAD), electron beam evaporation (EBE), ion beam deposition (IBD), molecular beam epitaxy (MBE), radio frequency (RF) and DC magnetron sputtering, sol-gel or metal organic decomposition (MOD) and metal organic chemical vapor deposition (MCOVD). None of these technologies are sufficient for the high volume manufacturing at low annealing temperatures (&lt;500 degrees Celsius) needed for aluminum metallization in VLSIC. MBE is capable of providing thin films with uniform crystal structure, but is not cost-effective. PLAD techniques have proven limited in large area depositions. IBD and EBE are unacceptable for large area deposition because of their low deposition rate. MOD, sol-gel and MCOVD methods are appropriate for high volume manufacturing but require annealing temperatures of greater than 650 degrees Celsius. Annealing temperatures of this magnitude are not feasible when thermally sensitive semiconductor substrates, such as silicon or gallium arsenide, are used. The high temperatures induce high reactivity and instability of those substrates and result in deleterious effects in the underlying active device structures.
Interdiffusion between substrate, electrodes and ferroelectric films further exacerbates the problem and limits the use of standard aluminum metallization in CMOS applications for VLSIC manufacturing.
No existing technology provides for a film deposition process that can manufacture thin ferroelectric films with high-quality characteristics. Optimization of thin film properties is important, especially for electronic and electro-optic applications, since optical (transmittance, index of refraction, etc.), dielectric, piezoelectric, pyroelectric and electro-optic properties are sensitive to composition, crystal structure, stochiometry, crystallinity, density, microstructure and crystallographic orientation.
Needs have long existed for methods of depositing thin ferroelectric films on semiconductor substrates that are quick, inexpensive, can be done at low temperatures, and ensure uniform crystallization.